Hi everyone and sorry for my poor English.
*Progress
I am developing measurement system on FPGA board(DE0) to communicate with 24bit-ADC(AD7190) via SPI and send digitized data to PC via UART(CP2012 : SiLabs is used). Also I am developing application which receive data from FPGA by UART and display it on graph by using Labview. And measuring condition is below.
*number of bits = 24(bit)
*sampling rate = 10(sps)
*baudrate = 19200(bps)
About UART settings in Labivew, the default settings are used exclude baudrate.
*Problem
When I use some terminal software(ex. Teraterm) for debug, I was able to receive 24bit-data(actually 3 byte) successfully without packet loss. But when I did same thing by Labview, sometimes packet loss was occurred randomly as shown in Fig. 1 and Fig. 2. In the both figure, return counts means how many bytes were received.
*Questions
How should I do to improve packet loss??
I want any comments or advices...
*References
I attached the screen shot of application's block diagram.
Thank you for reading
Yuki