Hello
I recently inherited some old code, which i was tasked to update.
In this code there is an element that confuses me (image below).
Basically an action is chosen with a case structure, connection established with VISA (first error bracket) and then data is read/written via VISA (second error bracket). What confuses me here is an error line that starts empty before a timed loop that runs through all case structures, but nothing is ever done to it, as error handling is done on a separate error line. This line is then shifted before a new timed loop begins. When timed loop runs out, data from register is written to a state machine.
So basically, what is the purpose of this?
Please excuse me for simplified image, i am not allowed to share any code.
